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PD - 95588 IRL1404PBF HEXFET(R) Power MOSFET l l l l l l l Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175C Operating Temperature Fast Switching Fully Avalanche Rated Lead-Free D VDSS = 40V G S RDS(on) = 4.0m ID = 160A Description Seventh Generation HEXFET(R) power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry. TO-220AB Absolute Maximum Ratings Parameter ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 srew Max. 160 110 640 200 1.3 20 620 95 20 5.0 -55 to + 175 300 (1.6mm from case) 10 lbf*in (1.1N*m) Units A W W/C V mJ A mJ V/ns C Thermal Resistance Parameter RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient (PCB Mounted) Typ. --- 0.50 --- Max. 0.75 --- 62 Units C/W www.irf.com 1 07/20/04 IRL1404PBF Electrical Characteristics @ TJ = 25C (unless otherwise specified) V(BR)DSS V(BR)DSS/TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Min. 40 --- --- --- 1.0 93 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- 0.038 --- --- --- --- --- --- --- --- --- --- --- 18 270 38 37 4.5 7.5 6590 1710 350 6650 1510 1480 Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 4.0 VGS = 10V, ID = 95A m 5.9 VGS = 4.3V, ID = 40A 3.0 V VDS = VGS, ID = 250A --- S VDS = 25V, ID = 95A 20 VDS = 40V, VGS = 0V A 250 VDS = 32V, VGS = 0V, TJ = 150C 200 VGS = 20V nA -200 VGS = -20V 140 ID = 95A 48 nC VDS = 32V 60 VGS = 5.0V, See Fig. 6 --- VDD = 20V ns --- ID = 95A --- RG = 2.5 VGS = 4.5V --- RD = 0.25 D Between lead, --- nH 6mm (0.25in.) G from package --- and center of die contact S --- VGS = 0V --- pF VDS = 25V --- = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 32V, = 1.0MHz --- VGS = 0V, VDS = 0V to 32V Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol --- --- 160 showing the A G integral reverse --- --- 640 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 95A, VGS = 0V --- 63 94 ns TJ = 25C, IF = 95A --- 170 250 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11). Starting TJ = 25C, L = 0.35mH RG = 25, IAS = 95A. (See Figure 12). ISD 95A, di/dt 160A/s, VDD V(BR)DSS, TJ 175C. Pulse width 300s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. Calculated continuous current based on maximum allowable junction temperature; for recommended current-handing of the package refer to Design Tip # 93-4. Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 75A. 2 www.irf.com IRL1404PBF 1000 I D , Drain-to-Source Current (A) 4.3V I D , Drain-to-Source Current (A) VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.3V TOP 1000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.3V TOP 4.3V 100 100 10 0.1 20s PULSE WIDTH TJ = 25 C 1 10 100 10 0.1 20s PULSE WIDTH TJ = 175 C 1 10 100 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 2.5 RDS(on) , Drain-to-Source On Resistance (Normalized) ID = 160A I D , Drain-to-Source Current (A) TJ = 25 C TJ = 175 C 2.0 1.5 1.0 0.5 100 4.0 V DS = 15V 20s PULSE WIDTH 5.0 6.0 7.0 8.0 0.0 -60 -40 -20 0 VGS = 10V 20 40 60 80 100 120 140 160 180 VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3 IRL1404PBF 10000 VGS , Gate-to-Source Voltage (V) 8000 VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd 20 ID = 95A VDS = 32V VDS = 20V 16 C, Capacitance (pF) Ciss 6000 12 4000 8 2000 Coss Crss 1 10 100 4 0 0 0 100 200 FOR TEST CIRCUIT SEE FIGURE 13 300 400 500 VDS , Drain-to-Source Voltage (V) QG , Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 10000 ISD , Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY RDS(on) 100 TJ = 175 C ID , Drain Current (A) 1000 10us 100us 10 100 1ms TJ = 25 C 1 0.0 V GS = 0 V 0.5 1.0 1.5 2.0 2.5 3.0 10 1 TC = 25 C TJ = 175 C Single Pulse 10 10ms 100 VSD ,Source-to-Drain Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRL1404PBF 160 LIMITED BY PACKAGE VDS VGS RD 120 RG 10V D.U.T. + -VDD ID , Drain Current (A) 80 Pulse Width 1 s Duty Factor 0.1 % 40 VDS 90% 0 25 50 75 100 125 150 175 TC , Case Temperature ( C) Fig 9. Maximum Drain Current Vs. Case Temperature 10% VGS td(on) tr t d(off) tf 1 D = 0.50 Thermal Response (Z thJC ) 0.20 0.1 0.10 0.05 0.02 0.01 0.01 SINGLE PULSE (THERMAL RESPONSE) P DM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.001 0.00001 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRL1404PBF 15V EAS , Single Pulse Avalanche Energy (mJ) 1500 VDS L DRIVER 1200 ID 49A 101A BOTTOM 121A TOP RG 20V D.U.T IAS tp + V - DD 900 A 0.01 600 Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp 300 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature ( C) I AS Fig 12b. Unclamped Inductive Waveforms Fig 12c. Maximum Avalanche Energy Vs. Drain Current 10 V QGS VG QG QGD 12V Current Regulator Same Type as D.U.T. 50K .2F .3F D.U.T. VGS 3mA + V - DS Charge IG ID Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit 6 www.irf.com IRL1404PBF Peak Diode Recovery dv/dt Test Circuit D.U.T* + + Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer - + RG VGS * dv/dt controlled by RG * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test + VDD * Reverse Polarity of D.U.T for P-Channel Driver Gate Drive P.W. Period D= P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt [VDD] Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% [ISD ] *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For N-channel HEXFET(R) power MOSFETs www.irf.com 7 IRL1404PBF TO-220AB Package Outline Dimensions are shown in millimeters (inches) 10.54 (.415) 10.29 (.405) 3.78 (.149) 3.54 (.139) -A6.47 (.255) 6.10 (.240) -B4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048) 2.87 (.113) 2.62 (.103) 4 15.24 (.600) 14.84 (.584) LEAD ASSIGNMENTS 1.15 (.045) MIN 1 2 3 LEAD ASSIGNMENTS IGBTs, CoPACK 1 - GATE 2 1- GATE- DRAIN 1- GATE 32- DRAINSOURCE 2- COLLECTOR 3- EMITTER 3- SOURCE 4 - DRAIN HEXFET 14.09 (.555) 13.47 (.530) 4- DRAIN 4.06 (.160) 3.55 (.140) 4- COLLECTOR 3X 3X 1.40 (.055) 1.15 (.045) 0.93 (.037) 0.69 (.027) M BAM 3X 0.55 (.022) 0.46 (.018) 0.36 (.014) 2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH 2.92 (.115) 2.64 (.104) 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. TO-220AB Part Marking Information E XAMPL E : T HIS IS AN IR F 1010 L OT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T H E AS S E MB L Y L INE "C" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE PAR T NU MB E R Note: "P" in assembly line position indicates "Lead-Free" DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR's Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.07/04 8 www.irf.com Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/ |
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